Functional Design Errors in Digital Circuits

by Kai-hui Chang

The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices.

Functional Design Errors in Digital Circuits

Author: Kai-hui Chang

Publisher: Springer Science & Business Media

ISBN: 1402093659

Page: 200

View: 964

Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization that simplify debugging; (2) an RTL error diagnosis method that identifies the root cause of errors directly; (3) a counterexample-guided error-repair framework to automatically fix errors in gate-level and RTL designs; (4) a symmetry-based rewiring technology for fixing electrical errors; (5) an incremental verification system for physical synthesis; and (6) an integrated framework for post-silicon debugging and layout repair. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices.

VLSI Circuits and Systems

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A Functional Validation Methodology Based on Error Models for Measuring the
Quality of Digital Integrated Circuits Celia López - Ongil ' ... Early location of
design errors could highly reduce the development time and cost for these
circuits .

VLSI Circuits and Systems

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The Error Latency of a Fault in a Combinational Digital Circuit

by Stanford University Stanford Electronics Laboratories. Digital Systems Laboratory

Digital Systems Laboratory. INTRODUCTION A common definition ( 1 ) of the
reliability of a digital circuit , which we term functional reliability , is the probability
that the circuit realizes the desired design function . The time to functional failure
is ...

The Error Latency of a Fault in a Combinational Digital Circuit

Author: Stanford University Stanford Electronics Laboratories. Digital Systems Laboratory

Publisher:

ISBN:

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National Bureau of Standards Miscellaneous Publication

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4 57 PASSIVE NETWORKS TRANSFER - FUNCTION SYNTHESIS WITH
COMPUTER AMPLIFIERS AND WJCC 55 7 ... 245 MULTIFUNCTIONAL
CIRCUITS IN FUNCTIONAL CANONICAL FCRM JACM594 538 A FUNCTIONAL
DESCRIPTION OF ... APPROACH TO THE FUNCTIONAL DESIGN OF A DIGITAL
COMPUTER WJCC61 393 THE FUNCTIONAL DESIGN ... PPROXIMATIONS
FOR THE ERROR FUNCTION AND FOR SIMILAR FUNCTIONS NOTE ON THE
CONSTRUCTION ...

National Bureau of Standards Miscellaneous Publication

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NBS Special Publication

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LOM RATIONAL FUNCTION ARE PASSIVE NETWORKS TRANSFER -
FUNCTION SYNTHESIS WITH COMPUTER ... 245 MULTIFUNCTIONAL
CIRCUITS IN FUNCTIONAL CANONICAL FCRM JACM594 538 A FUNCTIONAL
DESCRIPTION OF ... APPROACH TO THE FUNCTIONAL DESIGN OF A DIGITAL
COMPUTER WJCC61 393 THE FUNCTIONAL DESIGN ... 701 ELECT ONK 54
117 PPROXIMATIONS FOR THE ERROR FUNCTION AND FOR SIMILAR
FUNCTIONS NOTE ON ...

NBS Special Publication

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XI Brazilian Symposium on Integrated Circuit Design

by Marcelo Lubaszewski

After localizing the faulty macro f we start the design error diagnosis at the gate
level according to Theorem 6.2 . Different strategies ... Combining Functional and
Structural Approaches in Test Generation for Digital Systems . Micro - electronics
 ...

XI Brazilian Symposium on Integrated Circuit Design

Author: Marcelo Lubaszewski

Publisher: IEEE Computer Society

ISBN: 9780818687044

Page: 250

View: 644

Topics in this book on integrated circuit design include: hardware-software codesign of embedded systems; the ALFA-HUERTA project; rapid prototyping; digital testing; and digital design."

Signal and Power Integrity in Digital Systems

by James Edgar Buchanan

Actual in - circuit worst - case device parameters and interconnection delays must
be determined and used to ... To utilize the potential operating speed of today ' s
digital devices , the functional design and the interconnection and power ...
Nonetheless , most of the effort in most digital designs remains focused on the
functional logic design even though logic errors or functional concept errors are ...

Signal and Power Integrity in Digital Systems

Author: James Edgar Buchanan

Publisher: McGraw-Hill Companies

ISBN:

Page: 381

View: 848

"This book shows designers how to ensure signal integrity and control noise in high-speed digital systems - particularly important in a Pentium-paced environment where functional logic design is no longer separable from electrical and mechanical design." "Highlighting TTL, CMOS, and BiCMOS logic applications in a single source, Signal and Power Integrity in Digital Systems provides a practical solutions-oriented approach to a wide variety of relevant interconnection and timing issues." "Special features include noise tolerant logic architectures; power distribution techniques that reduce noise; clock distribution techniques that ensure clock signal quality; signal interconnection techniques that reduce crosstalk, signal loading, and transmission-line effects; how to get optimum performance from high-speed memory devices; and system application tips for high-speed PALs, PLAs, FIFOs, and ASICs." "Designers will also appreciate the practical engineering approximations provided for the calculation of design parameters along with illustrations and numerous tables usable for quick reference and comparison of characteristics." "It's a book every digital designer should have - engineers involved in the design of computers, peripherals, signal processors, and control and communications equipment, as well as young engineers facing their first designs using high-speed logic devices."--BOOK JACKET.Title Summary field provided by Blackwell North America, Inc. All Rights Reserved

Advanced Simulation and Test Methodologies for VLSI Design

by G. Russell

changes on the circuit at a given time it is only necessary to evaluate the changes
in logic state on those gates which are in the fanout list of ... of simulation resulted
from the need of digital circuit designers to have a more abstract description of
the circuit being developed. ... data, whose detail essentially masked the
macroscopic operation of the circuit, making it difficult to identify functional design
errors.

Advanced Simulation and Test Methodologies for VLSI Design

Author: G. Russell

Publisher: Springer Science & Business Media

ISBN: 9780747600015

Page: 378

View: 439

Digest of Papers

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A A functional and timing specification language ( FTL ) for modeling primitive
elements at the functional level . ... The simulation of digital circuits has become
both an effective way to reduce design errors and an essential aid in developing
 ...

Digest of Papers

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International Conference on Computer Aided Design and Manufacture of Electronic Components Circuits and Systems 3 6 July 1979 University of Sussex

by Institution of Electrical Engineers. Electronics Division

A PROPOSAL FOR AUTOMATED DESIGN VERIFICATION OF DIGITAL
SYSTEMS NO 7476N 7474N 7474N 7474N 7474N ... in the various phases of
digital system design in order to prevent the occurence of errors in the actual
implementation . ... Using basically the well known D - algorithm , two
combinatorial circuits can be shown to be functionally equivalent . ... Finally , the
SARA design philosophy ( 3 ) implies the need for checking functional
equivalence between descriptions of ...

International Conference on Computer Aided Design and Manufacture of Electronic Components Circuits and Systems 3 6 July 1979 University of Sussex

Author: Institution of Electrical Engineers. Electronics Division

Publisher: Inst of Engineering & Technology

ISBN:

Page: 231

View: 661

Design Automation Conference

by ACM Special Interest Group on Design Automation

In other words , if a circuit is known to be correct then the errors in the functional -
level description can be located , as it would be ... ( BARR84 ) H . G . Barrow , “
Verify : A Program for Proving Correctness of Digital Hardware Designs , "
Artificial ...

Design Automation Conference

Author: ACM Special Interest Group on Design Automation

Publisher:

ISBN: 9780897913102

Page:

View: 471

FTC 5

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Abstract In digital circuits there is typically a delay between the occurrence of a
fault and the first error in the output . This delay is the error latency of ... is the
probability that the circuit realizes the desired design function . The time to
functional ...

FTC 5

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Page: 265

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Computer aided Design of Microelectronic Circuits and Systems Digital circuit aspects and state of the art

by A. F. Schwarz

what follows , I survey formal techniques for verifying hardware designs . There
are many approaches to verifying the functional correctness of hardware designs
( 1003 ) . Symbolic simulation constitutes an ... A DDL verifier traces cause - effect
relationships to find assumed design errors . The programming language ...

Computer aided Design of Microelectronic Circuits and Systems Digital circuit aspects and state of the art

Author: A. F. Schwarz

Publisher:

ISBN:

Page: 1430

View: 509

Built in Test

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Abstract In digital circuits there is typically a delay between the occurrence of a
fault and the first error in the output . ... of a digital circuit , which we term
functional reliability , is the probability that the circuit realizes the desired design
function .

Built in Test

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